发明名称 Method and structure for graded gate oxides on vertical and non-planar surfaces
摘要 A method for forming an oxide layer on a vertical, non-planar semiconductor surface provides a low stress oxide layer having a pristine interface characterized by a roughness of less than 3 angstroms. The oxide layer includes a portion that is substantially amorphous and notably dense. The oxide layer is a graded growth oxide layer including a composite of a first oxide portion formed at a relatively low temperature below the viscoelastic temperature of the oxide film and a second oxide portion formed at a relatively high temperature above the viscoelastic temperature of the oxide film. The process for forming the oxide layer includes thermally oxidizing at a first temperature below the viscoelastic temperature of the film, and slowly ramping up the temperature to a second temperature above the viscoelastic temperature of the film and heating at the second temperature. After the second, high temperature oxidation above the viscoelastic temperature, the structure is then slowly cooled under gradual, modulated cooling conditions.
申请公布号 US7169714(B2) 申请公布日期 2007.01.30
申请号 US20040986984 申请日期 2004.11.12
申请人 AGERE SYSTEMS, INC. 发明人 CHAUDHRY SAMIR;ROY PRADIP K.
分类号 H01L21/469;C30B33/00;H01L21/28;H01L21/316;H01L21/321;H01L21/336;H01L29/51;H01L29/78 主分类号 H01L21/469
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