发明名称 Adjusting die placement on a semiconductor wafer to increase yield
摘要 A die placement of dice to be formed on a semiconductor wafer is adjusted by obtaining a die placement and one or more locations on the wafer contacted by one or more processing structures or a substance emitted by one or more processing structures. The die placement is adjusted based on the obtained one or more locations on the wafer.
申请公布号 US7169638(B1) 申请公布日期 2007.01.30
申请号 US20040802549 申请日期 2004.03.16
申请人 PDF SOLUTIONS, INC. 发明人 CADOURI EITAN
分类号 H01L21/44;H01L21/48;H01L21/50 主分类号 H01L21/44
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