发明名称 Semiconductor wiring substrate, semiconductor device, method for testing semiconductor device, and method for mounting semiconductor device
摘要 An apparatus for testing a semiconductor device by mounting a plurality of chip intellectual properties (IPs) on a common semiconductor wiring substrate, including a silicon wiring substrate on which the chip IPs are mounted. A circuit for a boundary scan test is formed on the silicon wiring substrate by connecting flip-flops to wiring, which are arranged to test connections in the wiring. An IP on Super-Sub (IPOS) device or each chip IP may be arranged to facilitate a scan test, a built-in self-test (BIST), etc., on the internal circuit of the chip IP.
申请公布号 US7171600(B2) 申请公布日期 2007.01.30
申请号 US20040828263 申请日期 2004.04.21
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 TAKEOKA SADAMI;OHTA MITSUYASU;ICHIKAWA OSAMU;YOSHIMURA MASAYOSHI
分类号 G01R31/28;G01R31/317;G01R31/3183;G01R31/3185;G06F11/22;G11C5/02;G11C29/48 主分类号 G01R31/28
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