| 摘要 |
An input buffer of a demodulator and a control method thereof are provided to prevent a data loss when a synchronization time of a timing clock is changed in the demodulator of a digital wireless communication system. An input buffer of a demodulator comprises the first buffer(111), the second buffer(112), the first counter(120), the second counter(130), and a multiplexing module(140). The first buffer(111) stores data corresponding to the preset length of a rear end among data packets which have been converted into a baseband signal. The second buffer(112) stores the data which has been converted into the baseband signal while the data stored in the first buffer(111) is outputted. The first counter(120) determines a data outputting position in the first and the second buffer(111,112). The second counter(130) determines a data storage position within the second buffer(112). The multiplexing module(140) selects and outputs either the data which has been converted into the baseband signal or the data stored at an inputting timing buffer.
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