| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a page buffer and a nonvolatile memory device including the same. <P>SOLUTION: The nonvolatile memory device includes a memory cell array and the page buffer. The page buffer includes a sense node selectively connected to the bit line of the memory cell array, a first main latch selectively connected to the sense node, a main latch circuit including a second main latch, and a latch input node selectively connected to the first and second main latches. The page buffer circuit includes a cache latch circuit including first and second cache latch nodes, a switch circuit for selectively connecting the second cache latch node to the latch input node, and a shared sense circuit connected between the latch input node and a reference potential. In this case, the shared sense circuit selectively connects the latch input node to the reference potential in response to the voltage of the sense node and the voltage of the first cache latch node. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
