| 发明名称 |
Translation lookaside buffer prediction mechanism |
| 摘要 |
According to one embodiment a central processing unit (CPU) is disclosed. The CPU includes a translation lookaside buffer (TLB). The TLB predicts a set index value prior to the generation of an effective address.
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| 申请公布号 |
US2007022270(A1) |
申请公布日期 |
2007.01.25 |
| 申请号 |
US20060528791 |
申请日期 |
2006.09.27 |
| 申请人 |
MORROW MICHAEL W;O'CONNOR DENNIS M;IYADURAI DESIKAN |
发明人 |
MORROW MICHAEL W.;O'CONNOR DENNIS M.;IYADURAI DESIKAN |
| 分类号 |
G06F12/00;G06F12/10 |
主分类号 |
G06F12/00 |
| 代理机构 |
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| 主权项 |
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