发明名称 INFORMATION PROCESSING APPARATUS
摘要 PROBLEM TO BE SOLVED: To restrict illegal access to a security releasing means by forming a time lag of prescribed time for the setting of a valid code or a valid bit. SOLUTION: An information processing apparatus 1 includes a security circuit part 2, a security code storage part 3, a comparator 4, an interface circuit 5, a flash ROM 6, a CPU (central processing unit) 7, and a plurality of external terminals 8. The security circuit part 2 includes a security release register 11, a valid monitoring timer part 12, an input data masking circuit 13, a two-input AND circuit 14, and a valid code register 15 to form a time lag of prescribed time for the setting of a valid code for releasing a security code. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007018442(A) 申请公布日期 2007.01.25
申请号 JP20050201992 申请日期 2005.07.11
申请人 TOSHIBA CORP;TOSHIBA LSI SYSTEM SUPPORT KK 发明人 MATSUSHITA YOSUKE
分类号 G06F21/24 主分类号 G06F21/24
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