发明名称 METHOD AND EQUIPMENT FOR EVALUATING PATTERN
摘要 <P>PROBLEM TO BE SOLVED: To perform evaluation and abnormality detection of a fine pattern formed on a semiconductor wafer and an aligner which exposed that pattern. <P>SOLUTION: Edge detection is performed for a fine pattern exposed by a stepper and the profile of each individual pattern is detected on the surface and bottom surface of resist. A misregistration vector indicative of positional relation of the patterns detected on the surface and bottom surface of resist is then calculated and displayed on the screen in order to evaluate the fine pattern. Furthermore, a misregistration vector is calculated similarly by fine patterns at a plurality of positions of chip, one-shot and wafer, size and distribution of misregistration vector at each place are classified as feature amounts, and then its trend is analyzed in each range thus detecting abnormality of an aligner or a wafer. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007019523(A) 申请公布日期 2007.01.25
申请号 JP20060189759 申请日期 2006.07.10
申请人 HITACHI LTD 发明人 SASAJIMA JIDAI;KOMURO OSAMU;MIZUNO FUMIO
分类号 H01L21/66;G01B15/04;H01L21/027 主分类号 H01L21/66
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