| 摘要 |
A matching circuit including a main matching block 51 inserted in a signal path and a series matching block 52 <SUB>2</SUB>, one end of which is connected to the main matching block 51 , in which one end of a series connection of a switch 54 <SUB>2 </SUB>and a parallel matching block 53 <SUB>2 </SUB>is connected to the signal path at the other end of the series matching block 52 <SUB>2 </SUB>and impedance matching between input/output is performed at any one of two frequencies by setting the switch to ON/OFF.
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