发明名称 MEMORY ACCESS CONTROL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To enable a data processor to efficiently make access to continuous data stored in a plurality of memory banks. SOLUTION: A first data transfer request from the data processor to a synchronizing memory is divided into a plurality of data transfer requests having a data quantity to be burst transferred at once, and which are in a single memory bank by a burst transfer length unit request dividing part 111a. The divided data transfer requests are assembled into data transfer requests where data transfer requests to each memory bank are combined one by one by a request assembly part 111b. When the data transfer requests to be combined are insufficient, a second transfer request is received and divided, and reassembled into data transfer requests where data transfer requests to each memory bank are combined one by one, and output as a plurality of new data transfer requests. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007018222(A) 申请公布日期 2007.01.25
申请号 JP20050198625 申请日期 2005.07.07
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OKAJIMA KAZUNORI
分类号 G06F12/06 主分类号 G06F12/06
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