发明名称 METHOD FOR OUTPUTTING DEFERRED VERTICAL SYNCHRONOUS SIGNAL AND IMAGE SIGNAL PROCESSOR PERFORMING THE METHOD
摘要 <p>A method for delaying and outputting a vertical synchronous signal and an image signal processor executing the method are provided to improve back-end chip processing efficiency and output the vertical synchronous signal at the most suitable point of time when encoded data is transferred to a receiving side. An image pick-up apparatus includes an image sensor(110), a sub image signal processor(410), an encoder(420), and a data output unit(430). The image sensor outputs an electric signal corresponding to an external image. The sub image signal processor performs a pre-process corresponding to at least one of filtering and interpolation for the electric signal. The encoder encodes the pre-processed electric signal to generate encoded image data. The data output unit outputs the encoded image data to a receiver(405). The sub image signal processor outputs a delay control instruction for expanding a vertical synchronous signal output period corresponding to a (k+1)th frame following a kth frame processed right after a capture instruction is inputted to the image sensor. The image sensor expands the vertical synchronous signal output period in response to the delay control instruction.</p>
申请公布号 KR100674474(B1) 申请公布日期 2007.01.25
申请号 KR20050104607 申请日期 2005.11.02
申请人 MTEK VISION CO., LTD. 发明人 NOH, YO HWAN
分类号 H04N5/91;H04N5/378;H04N19/00;H04N19/625;H04N19/70;H04N19/91 主分类号 H04N5/91
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