发明名称 INTERCONNECTIONS HAVING DOUBLE STORY CAPPING LAYER AND METHOD FOR FORMING THE SAME
摘要 An electric line of a semiconductor device having a two-story capping layer and a method for forming the electric line are provided to prevent an operation error of the semiconductor device due to a through-hole by applying a two-story barrier layer and the capping layer of a metal layer on a damascene line. An electric line of a semiconductor device having a two-story capping layer includes an interlayer dielectric(201), a metal layer(207), a metal compound layer(501), a first barrier layer, and a second barrier layer. The interlayer dielectric has a groove therein. The metal layer is formed inside the groove. The metal compound layer is positioned on the metal layer. The first barrier layer is arranged on the interlayer dielectric. The second barrier layer is arranged on the metal compound layer and the first barrier layer. The metal layer contains copper or a copper alloy. The metal compound layer is made of copper or silicon. A thickness of the first barrier layer is 100Š.
申请公布号 KR20070010979(A) 申请公布日期 2007.01.24
申请号 KR20050066007 申请日期 2005.07.20
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 OH, JUN HWAN;MAENG, DONG CHO
分类号 H01L21/28 主分类号 H01L21/28
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