发明名称 SHALLOW TENCH ISOLATION PROCESS AND STRUCTURE
摘要 A method of manufacturing an integrated circuit (IC) utilizes a shallow trench isolation (STI) technique. The shallow trench isolation technique is used in strained silicon (SMOS) process. The strained material (36) is formed after the trench (34) is formed. The process can be utilized on a compound semiconductor layer (15) above a buried oxide (Box) layer (14). ® KIPO & WIPO 2007
申请公布号 KR20070011262(A) 申请公布日期 2007.01.24
申请号 KR20067014049 申请日期 2004.12.21
申请人 ADVANCED MICRO DEVICES, INC. 发明人 XIANG QI;PAN JAMES N.;GOO, JUNG SUK
分类号 H01L21/762;H01L21/336;H01L29/10;H01L29/45;H01L29/786 主分类号 H01L21/762
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