| 摘要 |
<p>The invention relates to an electronic circuit, for amplifying an input signal, x 0 , comprising: a clipping unit for generating a signal, x, having a reduced peak-to-average power ratio by clipping the input signal x 0 ; a pre-distorter for generating a pre-distorted signal, ¾, defined by an pre-distortion algorithm which is based on the amplifier model function A; a representation unit for representing the amplifier model function, A, either in terms of coefficients of polynomials, or as look-up tables; a non-linear processing unit, in particular a power amplifier, for generating a processed signal, z, in particular by amplifying said received pre-distorted signal, ¾; a time delay unit for compensating the processing time for the pre-distorted signal ¾ generating the delayed pre-distorted signal ¾; and a time delay cascade for delaying the said delayed pre-distorted signal, ¾; at the integer sample clocks 1,2, ..., n generating the signals
¾ -1 ',¾ -2 ',...,¾ -n '
as well as an adaptation unit for learning the amplifier model function A using the amplified signal, z, and the delayed signals
¾,¾ -1 ',¾ -2 ',...,¾ -n '.</p> |
