| 摘要 |
A method for forming a bitline pattern in a semiconductor device is provided to guarantee an overlay margin of a conductive layer and a drain contact plug by making a conductive layer have a dual profile such that the conductive layer is filled after a drain contact plug for forming a bitline pattern is formed. A first interlayer dielectric(200) is formed on a semiconductor substrate having a predetermined structure including a drain. After a part of the first interlayer dielectric is removed, a conductor is filled to form a drain contact plug(202). A buffer oxide layer(204) is formed on the resultant structure. A part of the buffer oxide layer is removed to expose the drain contact plug so that a contact hole(206a) is formed. After the contact hole is filled with a conductor to form a first conductive layer(206), a second interlayer dielectric(208) is formed on the resultant structure. A part of the second interlayer dielectric is removed to expose the first conductive layer so that a trench is formed. The trench is filled with a conductor to form a second conductive layer(210) for a bitline. After the first or the second conductive layer is formed, a CMP process is performed.
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