Drain extended MOS transistors with multiple capacitors and methods of fabrication

摘要

Multi-capacitor drain extended transistor devices and methods are provided. A first capacitor structure comprises a first dielectric layer ( 14 ) and a first gate layer ( 16 ) and first and second lateral sides. The first capacitor structure overlies a channel region of a first conductivity type in a semiconductor substrate ( 4 ). A second capacitor structure comprising a second dielectric layer ( 26 ) and a second gate layer ( 28 ) is formed overlying the first gate structure. A source region ( 22 ) of a second conductivity type formed in the semiconductor substrate ( 6 ) proximate the first lateral side of the gate and a drain extension region/well ( 12 ) lightly doped of the second conductivity type is formed in the semiconductor substrate under a portion of the gate structure. A drain region ( 24 ) of the second conductivity type formed within the drain extension region ( 12 ). The first capacitor structure and the second capacitor structure connect in series to permit a higher operational gate voltage. Other systems and methods are disclosed.