| 摘要 |
<p>A flash memory device is provided to decrease hot electron injection by forming a trench between a source select transistor and a memory cell adjacent to the source select transistor so that an effective channel length is increased. A drain select transistor(DST) is connected to a bitline. A source select transistor(SST) is connected to a source line. A plurality of memory cells(MC0-MC31) are serially connected between the drain select transistor and the source select transistor. A trench is formed between the source select transistor and a memory cell adjacent to the source select transistor. An effective channel length is formed between the source select transistor and the memory cell adjacent to the source select transistor along the surface of the trench.</p> |
