发明名称 COMPLEMENTARY LOGIC CIRCUIT FOR CONSTANT POWER CONSUMPTION
摘要 A complementary logic circuit for constant power consumption is provided to minimize inconsistency of power consumption and make the constant power consumption by implementing two complementary circuits having an NMOS logic circuit symmetrically. A complementary logic circuit for constant power consumption includes a first logic circuit unit(210) and a second logic circuit unit(260). The first and second logic circuit units(210,260) are formed symmetrically. The first and second logic circuit units(210,260) include respectively four NMOS transistors. The four NMOS transistors are connected along left/right directions in parallel, and are connected along upward/downward directions in series. The first and second logic circuit units(210,260) form four discharging paths respectively. The four discharging paths include on-on, on-off, off-on, and off-off states. The power consumption generated from the four discharging paths are the same.
申请公布号 KR20070009920(A) 申请公布日期 2007.01.19
申请号 KR20050064551 申请日期 2005.07.16
申请人 POSTECH FOUNDATION;POSTECH ACADEMY-INDUSTRY FOUNDATION 发明人 KIM, YOUNG HWAN;LEE, JONG SUK
分类号 H03K19/20;H03K19/00 主分类号 H03K19/20
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