| 摘要 |
An address control circuit of a semiconductor memory device is provided to reduce current consumption by preventing unnecessary toggling of a row address in a bank during a bank precharge operation of the semiconductor memory device. A bank reset control unit(100) outputs a bank precharge signal for processing addresses having different voltage levels according to the precharge/active operation of a bank. A bank control signal generation part(400) outputs a row address enable signal in a pulse form by assembling an active signal and a refresh active signal during the active operation of the bank, and controls the row address enable signal to maintain a disabled state during the precharge operation of the bank. A bank address generation unit(600) latches a bank address by an internal active signal generated according to the row address enable signal in a pulse form during the active operation of the bank.
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