CLOCK CONTROL CIRCUITS FOR REDUCING CONSUMPTION CURRENT IN OPERATIONS OF A SEMICONDUCTOR MEMORY DEVICE FOR INPUTTING ADDRESS SIGNAL AND CONTROL SIGNALS, THE SEMICONDUCTOR MEMORY DEVICE WITH THE CLOCK CONTROL CIRCUITS, AND OPERATION METHODS OF THE SEMICONDUCTOR MEMORY DEVICE FOR INPUTTING ADDRESS SIGNAL AND CONTROL SIGNALS

摘要

A clock control circuit of a semiconductor memory device for reducing consumption current in inputting address signals and control signals, a semiconductor memory device including the same, and an inputting method thereof are provided to reduce unnecessary power consumption and power noise effect by generating the control signals external only when address signals or external control signals are actually inputted. A first clock generation circuit(131) outputs a first control clock signal while an internal address valid signal is enabled, in response to an input clock signal and an internal address valid signal. A second clock generation circuit(132) outputs a second control clock signal on the basis of the input clock signal. A plurality of first buffers receives first external signals including external address signals in response to the first control clock signal and outputs first internal signals to internal circuits. A plurality of second buffers receives second external signals including chip selection signals in response to the second control clock signal and outputs second internal signals to the internal circuits.