MOS transistor forming method for integrated circuit, involves forming zone of silicon-germanium alloy and depositing dielectric material at etched place of alloy to form insulating region, and etching is done after forming gate region

摘要

#CMT# #/CMT# The method involves delimiting an insulating region, and forming a gate region (G), source and drain regions which delimit a channel such that the gate region extends above the channel. The insulating region is formed by locally forming a zone formed of silicon-germanium alloy, selectively etching the alloy with respect to silicon and depositing a dielectric material at the etched place. The etching is performed after forming the gate region above a silicon-on-insulator semiconductor substrate deposited above a buried oxide layer. #CMT# : #/CMT# An independent claim is also included for an integrated circuit comprising a metal oxide semiconductor transistor. #CMT#USE : #/CMT# Used for forming a metal oxide semiconductor (MOS) transistor on a silicon substrate for an integrated circuit (claimed). #CMT#ADVANTAGE : #/CMT# The method eliminates the need for etching the silicon, so that the buried oxide layer is prevented from being attacked. The formation of the gate region permits to avoid the creation of parasitic transistors on the sides of the substrate. The method eliminates the need for forming a shallow trench isolation module for forming the insulating region. The deposition of the dielectric material can be performed at low temperature, so that it is adaptable to different technologies. The utilization of the silicon-germanium alloy permits to have a mono-crystalline material for the growth of a gate oxide, to limit the reliability problems of the oxide, and to form the silicon germanium zone in an easy and rapid manner. #CMT#DESCRIPTION OF DRAWINGS : #/CMT# The drawing shows a semiconductor device. G : Gate region 14 : Gate oxide layer #CMT#INORGANIC CHEMISTRY : #/CMT# The dielectric material is made of silicon nitride.