发明名称 SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To improve relieving efficiency of defects without worsening electrical characteristics in the case of access. SOLUTION: In order to equalize all the structures of memory blocks, a redundant word line and a redundant bit line are formed at each memory block. A redundant column selection line is wired in common to the memory blocks. A column redundant circuit is formed respectively corresponding to memory groups consisting of a prescribed number of memory blocks, and validated according to an enable signal. When all the row hit signals are inactivated, a column redundancy selection circuit activates the enable signal according to a block address signal. When one of the row hit signals is activated, the column redundancy selection circuit activates the enable signal corresponding to the activated block signal. A column redundancy circuit in an optional memory group can be validated according to the row hit signal, so that the saving efficiency of defects is improved without worsening the electrical characteristics in the case of access. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007012165(A) 申请公布日期 2007.01.18
申请号 JP20050191333 申请日期 2005.06.30
申请人 FUJITSU LTD 发明人 MORI IKU;OKUYAMA YOSHIAKI
分类号 G11C29/04;G11C11/401 主分类号 G11C29/04
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