MEMORY CONTROL DEVICE

摘要

There is provided a memory control device capable of smoothing memory access peak band width and achieving refresh operation required at a low peak band width by appropriately dividing the band width required for refresh operation. The memory control device operates a regular refresh request circuit normally performing refresh request at a constant ratio in parallel with a first and a second concentrated refresh request circuit corresponding to a first and a second requester and issuing refresh in a concentrated manner while the refresh request issuing condition is satisfied such as the time band when the memory access band width is lowered.