发明名称 |
PRINTED CIRCUIT BOARD HAVING MEANS FOR PREVENTING WARPAGE |
摘要 |
A printed circuit board having a warpage preventing unit is provided to reduce a warpage phenomenon of PCB significantly by enabling first and second warpage preventing units to compensate a stress caused by a warpage property. In a printed circuit board having a warpage preventing unit, an etching-treated conductive pattern is formed on upper and lower surfaces of a resin layer. A wire bonding conductive pattern is included in the conductive pattern. A solder mask is coated on a lower surface of the resin layer except for ball land. A first warpage preventing unit(10) formed by laminating a material with a low thermal expansion coefficient and the material with a high thermal expansion coefficient up and down, is attached to a space between an upper surface of the resin layer and the solder mask, except for the conductive pattern. A second warpage preventing unit(12) formed by laminating the material with the high thermal expansion coefficient and the material with the low thermal expansion coefficient up and down, is attached to a space between a low surface of the resin layer and the solder mask, except for the ball land.
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申请公布号 |
KR20070008956(A) |
申请公布日期 |
2007.01.18 |
申请号 |
KR20050063548 |
申请日期 |
2005.07.14 |
申请人 |
AMKOR TECHNOLOGY KOREA, INC. |
发明人 |
JIN, JUNG GI;YOON, JU HOON;JANG, HO CHEOL |
分类号 |
H05K1/02 |
主分类号 |
H05K1/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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