| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a data transfer unit which prevents PCI bus access from standing by for a long time by limiting burst length of access to a memory unit by an external device, according to the residual quantity of data temporarily stored from the PCI (peripheral components interconnect) bus. <P>SOLUTION: The data transfer unit accesses memory units connected through a host bus, and decides priority of the memory units occupying the host bus; the data transfer unit inputs to a FIFO (first-in first-out) data read-out from the memory units, and controls the amounts of data read-out from the memory units to be reduced while sufficient data are input to the FIFO and the amounts of data read-out from the memory units to be increased while sufficient data are not input to the FIFO. The data transfer unit performs data transfer efficiently by this constitution. <P>COPYRIGHT: (C)2007,JPO&INPIT |
