发明名称 TEST APPARATUS AND MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a test apparatus by which all of the prescribed data patterns can be written efficiently also to a memory having a bad block. SOLUTION: A test apparatus is provided with: a pattern memory storing a test pattern to be input to a memory to be tested; an address generating part outputting successively addresses of the memory to be tested in which the test pattern is to be written; a pointer part specifying successively respective addresses of the pattern memories in synchronization with the address of the tested memory output by the address generating part and outputting the test pattern to the pattern memory; a bad block memory storing previously the address of the bad block of the memory to be tested; and a pointer control part making the address generating part output the next address of the memory to be tested in a state in which the address of the pattern memory output by the pointer part is held in the same when the address of the memory to be tested generated by the address generating part coincides with any of addresses stored in the bad block memory. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007012221(A) 申请公布日期 2007.01.18
申请号 JP20050194704 申请日期 2005.07.04
申请人 ADVANTEST CORP 发明人 SATOU SHINYA
分类号 G11C29/56;G01R31/28 主分类号 G11C29/56
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