发明名称 |
Packaging chip having interconnection electrodes directly connected to plural wafers and fabrication method therefor |
摘要 |
A packaging chip formed with plural wafers. The packaging chip includes plural wafers stacked in order and plural interconnection electrodes directly connecting the plural wafers from an upper surface of an uppermost wafer of the plural wafers to the other wafers. At least one or more of the plural wafers mounts a predetermined circuit device thereon. Further, at least one or more wafers of the plural wafers have a cavity of a predetermined size. Meanwhile, the packaging chip further includes plural pads independently arranged on the upper surface of the uppermost wafer one another and electrically connected to the plural interconnection electrodes respectively. Accordingly, the present invention can enhance the performance and reliability of a packaging chip and improve fabrication yield. |
申请公布号 |
US2007013058(A1) |
申请公布日期 |
2007.01.18 |
申请号 |
US20060481012 |
申请日期 |
2006.07.06 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
CHOI MIN-SEOG;BACK KAE-DONG;SONG IN-SANG;KIM WOON-BAE;JEONG BYUNG-GIL;JUNG KYU-DONG |
分类号 |
H01L23/34 |
主分类号 |
H01L23/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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