| 摘要 |
A multi-valued DRAM is provided to improve integration degree of a device by storing at least two multi-valued data in one cell, and to restore data with low current by enabling only a word line. A multi-valued DRAM is used for storing multi-value levels, and includes at least one word line(WL), at least one bit line(BL), a DRAM cell connected to the intersection between the word line and the bit line, a current source transistor(M2) having a source connected to a supply voltage and a gate and a drain connected to the bit line, an SET(Single Electron Transistor) element having a gate connected to the bit line and a source connected to a grounding voltage, and a transistor having a gate connected to the grounding voltage. The transistor is connected between the bit line and a drain of the SET element.
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