发明名称 |
Processor for executing highly efficient VLIW instructions |
摘要 |
<p>A 32-bit instruction 50 is composed of a 4-bit format field 51, a 4-bit operation field 52, and two 12-bit operation fields 59 and 60. The 4-bit operation field 52 can only include (1) an operation code "cc" that indicates a branch operation which uses a stored value of the implicitly indicated constant register 36 as the branch address, or (2) a constant "const". The content of the 4-bit operation filed 52 is specified by a format code provided in the format field 51.
</p> |
申请公布号 |
EP1734440(A3) |
申请公布日期 |
2007.01.17 |
申请号 |
EP20060076804 |
申请日期 |
1998.06.15 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
TAKAYAMA, SHUICHI;HIGAKI, NOBUO |
分类号 |
G06F9/38;G06F9/30;G06F9/318 |
主分类号 |
G06F9/38 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|