| 摘要 |
A method and an apparatus for generating a column address enable signal for a synchronous semiconductor memory device are provided to prevent an erroneous operation of the semiconductor memory device by increasing a read/write operation margin for a high speed operation. An apparatus for generating a column address enable signal for a synchronous semiconductor memory device includes a column access detector(510), a delay circuit(520), and a signal generator(530). The column access detector receives plural internal column command signals and generates a column access flag signal. The delay circuit provides delay time information corresponding to the pulse width of the column address enable signal to the column access flag signal. The signal generator generates the column address enable signal in response to an activation signal or a deactivation signal. The activation signal corresponds to the activation timing of the column access flag signal. The deactivation signal corresponds to an activation timing of the column access flag signal.
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