HIGH VOLTAGE OUTPUT CIRCUIT FOR DISPLAY DRIVER

摘要

A high voltage output circuit for a display driver is provided to prevent all transistors from being simultaneously turned on by adjusting timings for application signals for the transistors. A high voltage output circuit for a display driver includes a level shifter(100), a timing controller(110), and a high voltage buffer(120). The level shifter includes two PMOS(Positive Metal Oxide Semiconductor) and NMOS(Negative Metal Oxide Semiconductor) transistors. Each of the PMOS transistors is connected in a latch structure. Low voltage logic level signals are applied on gate terminals of the NMOS transistors. The timing controller generates different output signals by using the voltage difference between complementary connection points of the level shifter. The high voltage buffer includes at least one PMOS transistor, which receives an output signal from the timing controller, and an NMOS transistor, which is connected to the PMOS transistor in a complementary configuration. The high voltage buffer drives a display device element at a high voltage.