发明名称 Method of formation of dual gate structure for imagers
摘要 A device, as in an integrated circuit, includes diverse components such as transistors and capacitors. After conductive layers for all types of components are produced, a silicide layer is provided over conductive layers, reducing resistance. The device can be an imager in which pixels in an array includes a capacitor and readout circuitry with NMOS transistors. Periphery circuitry around the array can include PMOS transistors. Because the silicide layer is formed after the conductive layers, it is not exposed to high temperatures and, therefore, migration and cross-contamination of dopants is reduced.
申请公布号 US7164161(B2) 申请公布日期 2007.01.16
申请号 US20030714670 申请日期 2003.11.18
申请人 MICRON TECHNOLOGY, INC. 发明人 HONG SUNGKWON C.
分类号 H01L27/108;H01L21/02;H01L21/28;H01L21/8238;H01L21/8242;H01L27/06;H01L27/146;H01L27/148 主分类号 H01L27/108
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