| 摘要 |
A method for manufacturing a semiconductor device is provided to increase the contact area in a junction region and to reduce the contact resistance by forming a CoSi2 layer on the junction region of a peripheral region. A gate(106) and a spacer(111a) are formed on a cell region(C) and a peripheral region(P) of a substrate(100). A junction region(112) is formed in the substrate. A landing plug(115) is formed on the junction region of the cell region through a first interlayer dielectric(113). A second interlayer dielectric(116) is formed on the resultant structure. The junction region is exposed by etching the first and the second interlayer dielectric, and the spacer of the peripheral region. A cobalt layer and a capping layer are deposited on the resultant structure. A CoSi2 layer(120) is formed on the junction region by performing sequentially first and second annealing. Contact plugs are formed to connect the junction region of the peripheral region and the gate through a third interlayer dielectric.
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