| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a device for achieving jitter reduction and area reduction of a DLL. <P>SOLUTION: A delay-locked loop device comprises: a first delay circuit line including a plurality of stages of delay units 101-110; a second delay circuit line including a plurality of stages of delay units 111-121; and a plurality of transfer circuits 131-141 provided in accordance with each stage of the first delay circuit line for controlling transfer of outputs from the stages of the first delay circuit line to corresponding stages of the second delay circuit line based on control signals that are input thereto, respectively. The delay units 101-110 on the stages of the first delay circuit line invert out input signals, a delay unit on each stage of the second delay circuit line includes a logic circuit which inputs an output of the transfer circuit corresponding to the delay unit and an output of a delay unit on the preceding stage of the delay unit and outputs an output signal to the following stage and by independently selecting propagation paths of rising and falling edges of an inputted signal, a duty ratio is made variable. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
