| 摘要 |
PROBLEM TO BE SOLVED: To provide a bus system that reduces delay time using a simple technique. SOLUTION: A bus system that connects a CPU 11 to peripheral circuits 31-34 includes flip-flops 41-44 for sending or receiving signals between the peripheral circuits 31-34 and the CPU 11, and connection means 51, 52 for connecting the flip-flops 41-44 so that a shift register is formed. The CPU 11 is connected to the flip-flop 41 that corresponds to the peripheral circuit 31 requiring the fastest response among the peripheral circuits 31-34. COPYRIGHT: (C)2007,JPO&INPIT
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