发明名称 Multi-layered substrate assembly with vialess electrical interconnect scheme
摘要 A multi-layered substrate ( 42 ) is disclosed. The substrate ( 42 ) includes at least a receptor layer ( 46 ) and a bonding layer ( 64 ). One or more holes ( 54 ) extend completely through the receptor layer ( 46 ). A shaped block ( 10 ) may be disposed in a given hole ( 54 ). When the substrate ( 42 ) is compressed, the upper surface ( 14 ) of the block ( 10 ) and the upper surface ( 50 ) of the receptor layer ( 46 ) are disposed in coplanar relation, and bonding material ( 68 ) from the bonding layer ( 64 ) flows into the hole ( 54 ) to fill any gap between the receptor layer ( 46 ) and the block ( 10 ) within the hole ( 54 ).
申请公布号 US2007007637(A1) 申请公布日期 2007.01.11
申请号 US20050201682 申请日期 2005.08.11
申请人 MARINOV VALERY R 发明人 MARINOV VALERY R.
分类号 H01L23/02 主分类号 H01L23/02
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