| 摘要 |
A voltage (V 1 -V 2 ) between a predetermined point P 2 on a copper foil pattern 4 connected to a source of a switching FET (T 1 ) and a drain P 1 of the FET (T 1 ) is input into an input terminal of a comparator CMP 1 as an overcurrent determination voltage for comparison with a reference voltage V 3. As this occurs, since there exists a voltage that is to be dropped by a resistor Rp possessed by the copper foil 4, the voltage (V 1 -V 2 ) becomes larger than an inter-terminal voltage VDS of the FET (T 1 ), and as a result, the effect imposed by an offset voltage V<SUB>off </SUB>possessed by the comparator CMP 1 can be reduced.
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