发明名称 CURRENT LIMIT CIRCUIT OF LOW DROP OUT REGULATOR
摘要 A current limit circuit of a low-voltage drop regulator is provided to reduce power consumption of the low-voltage drop regulator by decreasing or suppressing the current flowing through first and second current limit units during a normal operation of the low-voltage drop regulator. A current limit circuit of a low-voltage drop regulator includes an error amplifier, a path transistor(MOUT), a first current limit unit(110), and a second current limit unit(120). A reference voltage is inputted to an inverted terminal while a divided output voltage is inputted to a non-inverted terminal of the error amplifier. An output terminal of the error amplifier is connected to a gate of the path transistor, which has a source and a drain connected to input and output power terminals, respectively. The first current limit unit is arranged between the path transistor and the power input terminal, so that a constant output voltage is outputted from the power output terminal. The first current limit unit defines a current limit point during the power input terminal is disconnected from the first current limit unit or an excessive load is applied on the current limit unit. The second current limit unit is arranged among the path transistor, the first current limit unit, and the power input terminal, so that the current flowing through the path transistor is reduced, when the power input terminal is disconnected from the first current limit unit or an excessive load is applied on the current limit unit.
申请公布号 KR20070006514(A) 申请公布日期 2007.01.11
申请号 KR20050061914 申请日期 2005.07.08
申请人 KEC CORPORATION 发明人 HEO, CHANG JAE;JIN, TAE
分类号 G05F3/16 主分类号 G05F3/16
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