| 摘要 |
A power line for supplying a power supply voltage to a clock buffer and a power line for supplying a power supply voltage to another circuit are isolated from each other in both a semiconductor integrated circuit and a semiconductor package. Accordingly, even when power supply noise occurs in the circuit in the integrated circuit but also when a potential variation occurs in a power supply voltage supplied to the circuit in the package, entering of the power noise in the clock buffer is suppressed. Since a power line for the clock buffer is a dedicated line, the amount of current flowing in this power line is reduced, and the potential-variation amount of a power supply voltage supplied to the clock buffer is further reduced. Accordingly, even when variation of a power supply voltage occurs in a non-clock system circuit, clock jitter in a clock system circuit is effectively suppressed.
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