| 摘要 |
A method for fabricating a MOS is provided to reduce the stress applied to a channel between a source region and a drain region and increase mobility of carriers by forming a buffer layer pattern with high tensile stress on the lower side surface of a gate electrode and on the upper surface of the source/drain region before the gate electrode is formed. A nitrogen-containing buffer layer pattern(102) having a thickness of 500~1500 angstroms is formed on a semiconductor substrate(100), open in a gate electrode formation region and made of a silicon nitride layer or a silicon oxynitride layer. A gate insulation layer(105) is formed on the semiconductor substrate exposed by the open region of the buffer layer pattern, and a gate electrode(106a) is formed on the gate insulation layer. An LDD(lightly doped drain) region(108) is formed in the vicinity of the edge of the gate electrode and on the semiconductor substrate under the buffer layer pattern. A spacer insulation layer(110a,112) is formed on a part of the upper part of the buffer layer pattern and on the lateral surface of the gate electrode. A source/drain region(114) is formed in the vicinity of the edge of the spacer insulation layer and in the semiconductor substrate under the buffer layer pattern.
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