发明名称 Verification of a digital message stored in a memory zone
摘要 <p>The method involves partitioning a digital quantity into blocks of identical size, and applying a symmetrical encryption algorithm to each block. A one-to-one, non linear function (FCT) is applied to a result (MAC) of the previous steps for obtaining a current value (AUTH) that is to be compared with an expected value provided from the exterior of a processor. Each block is combined with the result provided by the algorithm from the previous block. Independent claims are also included for the following: (1) an integrated processor comprising a unit for implementing a method for verifying a digital quantity (2) a mobile telephone comprising a processor.</p>
申请公布号 EP1742412(A1) 申请公布日期 2007.01.10
申请号 EP20060116672 申请日期 2006.07.05
申请人 ST MICROELECTRONICS S.A. 发明人 TEGLIA, YANNICK;LIARDET, PIERRE-YVAN
分类号 H04L9/32 主分类号 H04L9/32
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