发明名称 FAST PHASE-FREQUENCY DETECTOR ARRANGEMENT
摘要 The present invention relates to a detector arrangement and a charge pump circuit for a recovery circuit recovering timing information for random data. The detector arrangement comprises first latch means for sampling a quadrature component of a reference signal based on an input signal, to generate a first binary signal, a second latch means for sampling an in-phase component of the reference signal based on the input signal, to generate a second binary signal, and a third latch means for sampling the first binary signal based on the second binary signal, to generate a frequency error signal. Thus, a simple and fast detection circuitry can be achieved based on a digital implementation. Furthermore, the charge pump circuit comprises a differential input circuit and control means for controlling a tail current of the differential input circuit in response to a frequency- locked state of frequency detector arrangement. This provides the advantage that behavior of the charge pump circuit can alleviate extra ripple generated by the detector arrangement. ® KIPO & WIPO 2007
申请公布号 KR20070005675(A) 申请公布日期 2007.01.10
申请号 KR20067021368 申请日期 2006.10.13
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 SANDULEANU MIHAI A. T.;STIKVOORT EDUARD F.
分类号 H03L7/093;H03D13/00;H03L7/08;H03L7/087;H03L7/089 主分类号 H03L7/093
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