发明名称 Comparator feedback peak detector
摘要 There is disclosed a circuit and a process for detecting peak-to-peak voltage. The circuit comprises a first comparator having an output coupled to a first capacitor, a non-inverting input for receiving a high frequency AC waveform, and an inverting input, a second comparator having an output coupled to a second capacitor, and a first second input, an operational amplifier having a non-inverting input coupled to the inverting input of the first comparator, and an inverting input coupled to the first input. The process comprises charging a first capacitor when a high frequency AC waveform voltage is greater than a buffered voltage of the first capacitor, charging a second capacitor when an inverted buffered voltage of the second capacitor is greater than the high frequency AC waveform voltage, and outputting a voltage based on the buffered voltage of the first capacitor and the inverted buffered voltage of the second capacitor.
申请公布号 US7161392(B2) 申请公布日期 2007.01.09
申请号 US20040876161 申请日期 2004.06.23
申请人 TERADYNE, INC. 发明人 NAKAMURA ATSUSHI
分类号 G01R19/00;G01R19/04;H03K5/153 主分类号 G01R19/00
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