| 摘要 |
A method for manufacturing a flash memory device is provided to reduce the capacitance between floating gates and to obtain contact margin by forming an HDP(High Density Plasma) oxide layer between gate lines. Gate lines(106) are formed on a semiconductor substrate(100). A buffer oxide layer(108) is formed on the resultant structure. An HDP oxide layer(109) having the same height as a floating gate has is formed on a cell region between the gate lines. A nitride spacer(110) is then formed at both sidewalls of the exposed gate lines.
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