发明名称 CHECK METHOD OF MISALIGN IN STACKED STRUCTURE
摘要 A misalign checking method in a stacked structure is provided to check easily the degree of overlay between upper and lower layers in spite of the interposition of an opaque layer between the upper and lower layers by securing previously the degree of misalign between the upper and lower layers. A first degree of misalign of a lower overlay vernier pattern is obtained from a lower layer by comparing the first misalign degree with a normal state(S1). A second degree of misalign of an upper overlay vernier pattern is obtained from an upper layer by comparing the second misalign degree with the normal state(S2). The degree of overlay between the upper and lower layers is checked by using the first and second misalign degrees(S3).
申请公布号 KR20070002271(A) 申请公布日期 2007.01.05
申请号 KR20050057703 申请日期 2005.06.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 YIM, DONG GYU
分类号 H01L21/66 主分类号 H01L21/66
代理机构 代理人
主权项
地址