MONOLITHIC INTEGRATED ENHANCEMENT MODE AND DEPLETION MODE FIELD EFFECT TRANSISTORS AND METHOD OF MAKING THE SAME

摘要

A depletion mode (D-mode) field effect transistor (FET) is monolithically integrated with an enhancement mode (E- mode) FET in a multi-layer structure. The multi-layer structure includes a channel layer overlaid by a barrier layer overlaid by an ohmic contact layer. Source and drain contacts of the D-mode and E-mode FETs are coupled to the ohmic contact layer. A gate contact of the D-mode and E- mode FETs is coupled to the barrier layer. An amorphized region is provided beneath the E-mode gate contact within the barrier layer. The amorphized region forms a buried E-mode Schottky contact with the barrier layer. An alternative embodiment couples the gate contact of the D-mode transistor to a first layer that overlies the barrier layer, and provides a similar D-mode amorphized region within the first layer. ® KIPO & WIPO 2007