| 摘要 |
<p>A method for manufacturing a flash memory device is provided to prevent the short between a floating gate and an active region and to reduce parasitic capacitance by forming an isolation layer with different height. A first conductive layer(14) as a floating gate and a pad layer are formed on a substrate(10). By patterning the layers, a trench is formed to define an active region. A first gap-fill layer is partially filled in the trench, and a second gap-fill layer is entirely filled in the trench. After planarization is performed to expose the pad layer, an isolation layer is defined by removing the exposed pad layer. By etching selectively the center portion of the isolation layer, an isolation layer(18) having different height is then formed.</p> |
