发明名称 Various apparatuses and methods for reduced power states in system memory
摘要 A method, apparatus, and system are described in which a memory controller may have two or more registers to create and track zones of memory in a volatile memory device. The memory controller controls a power consumption state of a first zone of memory in the volatile memory device and a second zone of memory within the first volatile memory device on an individual basis; and one or more memory arrays contained within the first volatile memory device.
申请公布号 US2007005998(A1) 申请公布日期 2007.01.04
申请号 US20050174060 申请日期 2005.06.30
申请人 JAIN SANDEEP;KARDACH JAMES P 发明人 JAIN SANDEEP;KARDACH JAMES P.
分类号 G06F1/00 主分类号 G06F1/00
代理机构 代理人
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