Method and system for desensitization of chip designs from perturbations affecting timing and manufacturability

摘要

The system and method disclosed here are directed to desensitization of paths to perturbations resulting from manufacturing faults. A threshold value for signal slew filters out some near-critical paths, and a mathematical formula is applied to determine the appropriate upsize for the cell driving the net along the near-critical path. The cell driving the net may be then be upsized in order to improve the timing through the cell, increase the positive slack, and reduce the sensitivity of the net to design perturbations.