| 摘要 |
<p>A method for manufacturing a flash memory device is provided to minimize the interference between gate lines and to widely secure a source/drain contact forming region by remaining a dielectric on a sidewall of the gate line only. A first junction region(202) is formed an active region of a semiconductor substrate(201) where a source select line(SSL), plural word lines(WL0,WL1), a drain select line(DSL) are formed. As a dielectric gap-fills gaps between the word lines, between the word line and the source select line, and between the word line and the drain select line, a first spacer(203) is formed on sidewalls of the source select line and the drain select line with the dielectric. A second spacer is formed at the first spacer on the sidewalls of the source select line and the drain select line. A second junction region(205) is formed on the first junction region between the second spacers. The second spacer is eliminated.</p> |
